Getting Started with Anabit's Quadra DAC 12 / 14 / 16 Bits 4 Channels
Quadra DAC summary:
Anabit's Quadra DAC is a four-channel, open-source, buffered voltage-output digital-to-analog converter (DAC) reference design. It is available in 16-, 14-, or 12-bit resolutions, each version has the same pinout and can be run using the example Arduino code linked below. Each version supports a sampling rate up to 200 kSPS per channel. Quadra DAC is powered from a single 5 V DC rail, while the digital/SPI circuits can share the 5 V rail or use an auto-detected 1.8–5.0 V logic supply for clean level matching. The Quadra DAC allows you to control each of the 4 channels simultaneously (using same output data) or individual output update control.
Each output is rail-to-rail op-amp buffered; with a drive capability +/-5mA with built-in short circuit protection. The Quadra DAC's design layout, component selection, and power noise filtering stage emphasize low drift and low noise on the output analog signals. The Quadra DAC delivers excellent analog output accuracy, which you can see for yourself by checking out the specifications at the end of this guide. Finally the Quadra DAC features low power consumption, especially with the outputs off. Great for portable or remote battery powered applications
Quadra DAC Pin Description and Technical Capabilities:
Below is a diagram of the Quadra DAC pins or connections. The top is the analog output and voltage reference output pins. At the bottom you will find the input power, SPI communication, and hardware control pins. The Quadra was designed to keep the noisy power and digital signals on one side of the design and the precision analog signals on the opposite. The following is a detailed description of the Quadra DAC pins:
- The "5V Pwr In" pin (+5V) along with any ground pin (GND) is where to connect your 5V rail to power the Quadra DAC. If you want to use the Quadra DAC at its full output range of 5V it is critical that your source be equal to 5V or slightly higher.
- The "Dig Pwr In" pin (DVin) is optional and is meant for interfacing with a device like a microcontroller that does not use 5V logic. You can input a 1.8V to 5V power source along with a GND connection to power the digital circuits and set the logic level. The Quadra DAC automatically senses a power input on this pin switches the digital circuitry to it.
- The "LDAC" pin or "Load DAC" pin gives you hardware control for when a DAC output or all outputs are updated. This is an optional pin and is meant for deterministic hardware control of the DAC's outputs. By default the LDAC pin is pulled high. Refer to the DAC datasheet at the end of this guide for more details on the LDAC pin (page 23).
- The "Gain" pin controls the output voltage range of all the DAC channels. When the Gain pin is low (pulled low by default), the DAC's gain is 1 and its output range is 0V to 2.5V. When the Gain pin is pulled high, the DAC's gain is 2 and its output range is 0V to 5V.
- The next four pins are the SPI communication and output control. These are not optional pins and must be used to setup and control the DAC.
- The Control In Peripheral Out (CIPO) pin is used to read settings back from the Quadra DAC
- SPI Clock (SCLK) pin is the input clock signal for the SPI communication. The clock rate helps set the updated rate of the DAC, the faster the clock rate the faster the DAC's output update rate. The max supported clock frequency is 50MHz.
- The SYNC pin is used to update the DAC's output and serves the Chip Select function of the SPI communication. Pulling it low tells the DAC there is data coming. See the example code for using the SYNC pin along with the SPI communication
- The Control Out Peripheral In (COPI) pin is the line that sends output data and settings to the DAC
- The Reset (RST) pin, if pulled low, will put the DAC IC into its reset or power on state. It is pulled high by default
- The Reset Select (RSTSEL) pad circled in red on the diagram sets each channels default output behavior when powered up or after a reset. By default it is pulled low so each output starts at 0V at power up. If you place a solder short across the pad circled in red it will have each output powered up at 1/2 the full scale voltage (depending on the state of the gain pin).
The four DAC output channels are labeled at the top of the design 1 through 4. Note that the datasheet labels them A through D. Each output has corresponding AGND pin or low noise ground connection. You can also access the DAC's on board 2.5V precision voltage reference (labeled "2.5 VREF"). The 2.5V reference can source or sink up to 5mA, if you pull more current than that from the reference the voltage will drop and the DAC outputs will lose range and accuracy.
Quadra DAC Example Code and Where to get Help:
Below is a link to access example code for the Quadra DAC that runs in the Arduino programming environment. It is designed to work with any Arduino board that supports hardware SPI communication (most Arduinos). The example code allows you to define an output voltage for each of the four channels in the setup function. From there it provides an option to output a continuous sinewave from channel 4. Pay close attention to some of the initial global settings (such as 12 / 14 /16 bits) before uploading. Happy signal generating with the Quadra DAC and if you run into trouble please use the link to Anabit's DAC forum below to get help.
Click here to access the Quadra DAC's example code on GitHub
Click here to access the Anabit DAC forum to get help
Quadra DAC Specifications:
Accuracy (25 °C, no user calibration, internal ref on):
- 16-bit model: ±(0.10% of reading + 2 LSB)
- 14-bit model: ±(0.10% of reading + 1 LSB)
- 12-bit model: ±(0.10% of reading + 1 LSB)
Sending DAC output data and changing / reading back settings is done using SPI communication. Max SPI clock rate — 50 MHz.
DAC output settling time (¼→¾ Full Scale, to ±2 LSB) — 5 µs typ, 8 µs max (16-/14-bit); 5 µs typ, 7 µs max (12-bit).
Max recommended DAC update rate (from settling spec) — about 200 kS/s typ (1/5 µs); 125–143 kS/s worst-case (1/8–1/7 µs). Derived from settling-time table.
Analog Devices
Analog output drive — Stable for RL ≥ 1 kΩ with CL up to 2 nF (or 10 nF when RL = 1 kΩ). Output current capability ±5 mA (per channel). Short-circuit ≈40 mA
Quadra DAC 5 V input power current consumption (no load) — ~1.1 mA typ, 1.3 mA max with internal reference enabled. Current consumption with max load on outputs 50mA.
Internal 2.5 V reference — 2 ppm/°C typ (5 ppm/°C max) tempco; available on VREF pin and can source ±5 mA to external loads.
Form factor (see tutorial section for pin descriptions):
- Dimensions: 38 mm x 35.5 mm
- Mounting holes: 3.5 mm diameter
- Pin headers: 2.54 mm spacing