How SAR ADCs Work — and How to Drive Them with the Right Front End Design

Successive Approximation Register (SAR) ADCs are among the most popular analog-to-digital converters in embedded systems, instrumentation, and precision data acquisition. They strike a great balance between resolution, conversion speed, power consumption, and simplicity.

Besides understanding how the SAR ADC works it is also important to understand how to design a "Front End" to properly drive them. The core make up of a SAR front end is an op amp and a charge bucket filter which is a simple RC filter. Is a Front End circuit always needed to drive a SAR ADC? No, you can get away without a front end when working with lower sampling rate SAR ADC that are measuring a fairly low impedance source. But once you get into faster sampling rate or working with high impedance sources the Front End is a must. 

To help us out with this tutorial we are leveraging a great video from the TI Precision Lab series. The title of the video makes it sounds like it just focuses on designing a front end for a SAR ADC (which it does cover of course), but it also starts with a great explanation of how a SAR ADC works. If you are interested to learn more about ADCs we encourage you to check out the whole precision lab video series. 

🔍 Quick Overview of SAR ADC

A SAR ADC converts an analog input voltage into a digital code using a binary search algorithm. It does this by comparing the input voltage to the output of an internal digital-to-analog converter (DAC), one bit at a time, over several clock cycles.

SAR ADCs typically offer:

• 10–18 bits of resolution
• Sampling rates from kSPS to tens of MSPS
• Low latency (no pipeline delay)
• Low power consumption
• Single-shot or continuous conversion modes